Power switching circuits such as bridge circuits are commonly used in a variety of applications. A prior art circuit schematic of a 3-phase bridge circuit 100 configured to drive a motor is shown in FIG. 1. Each of the three half bridges 115, 125, and 135 in circuit 100 includes two transistors, 141 and 142, 143 and 144, and 145 and 146, respectively, which are able to block voltage in a first direction and are capable of conducting current in the first direction or optionally in both directions. In applications where the transistors employed in the bridge circuit 10 are only capable of conducting current in one direction, for example when the transistors are silicon IGBTs, an anti-parallel diode (not shown) may be connected to each of the transistors 141-146. The gate voltages of each of transistors 141-146 are applied by gate drivers 151-156, respectively. As shown in FIG. 1, gate drivers 151-156 are each coupled between the gate and source of their respective transistor. Gate drivers 151-156 may each be individual circuits. Or, the gate drivers of each half bridge 115, 125, and 135 can be integrated into a single gate drive circuit. Or alternatively, the gate drivers of all of the transistors 141-146 in the bridge circuit can be integrated into a single gate drive circuit.
Each of transistors 141-146 is capable of blocking a voltage at least as large as the high voltage (HV) source 101 of the circuit 100 when they are biased in the OFF state. That is, when the gate-source voltage VGS applied by the gate drive circuits 151-156 to any of transistors 141-146, respectively, is less than the transistor threshold voltage Vth, no substantial current flows through the transistor when the drain-source voltage VDS (i.e., the voltage at the drain relative to the source) is between 0V and HV. When biased in the ON state (i.e. with VGS greater than the transistor threshold voltage), the transistors 141-146 are each capable of conducting sufficiently high current for the application in which they are used.
As used herein, the term “blocking a voltage” refers to a transistor, device, or component being in a state for which significant current, such as current that is greater than 0.001 times the average operating current during regular ON-state conduction, is prevented from flowing through the transistor, device, or component when a voltage is applied across the transistor, device, or component. In other words, while a transistor, device, or component is blocking a voltage that is applied across it, the total current passing through the transistor, device, or component will not be greater than 0.001 times the average operating current during regular ON-state conduction.
The transistors 141-146 may be enhancement mode or E-mode transistors (normally off, Vth>0), or depletion mode or D-mode (normally on, Vth<0) transistors. In power circuits, enhancement mode devices are typically used to prevent accidental turn on which may cause damage to the devices or other circuit components. Alternatively, the transistors 141-146 can be replaced by a high-voltage D-mode transistor 201 and a low voltage E-mode transistor 202 connected in a cascode configuration 200, as shown in FIG. 2. In prior art cascode device 200 of FIG. 2, the source 211 of D-mode transistor 201 is connected to the drain 216 of E-mode transistor 202, and the gate 212 of D-mode transistor 201 is electrically connected or electrically coupled to the source 214 of E-mode transistor 202. Cascode device 200 is configured to operate as a high-voltage E-mode device, with node 221 functioning as the source, node 222 functioning as the gate, and node 223 functioning as the drain. Referring back to FIG. 1, nodes 117, 118, and 119 are all coupled to one another via inductive loads, i.e., inductive components such as motor coils (not shown in FIG. 1).
As used herein, two or more contacts or other items such as conductive layers or components are said to be “electrically connected” if they are connected by a material which is sufficiently conducting to ensure that the electric potential at each of the contacts or other items is substantially the same or about the same regardless of bias conditions.
FIG. 3A shows prior art half bridge 115 of the full 3-phase motor drive in FIG. 1, along with the winding of the motor (represented by inductive component 321) between nodes 117 and 118. Also shown is transistor 144, into which the motor current feeds. For this phase of power, transistor 144 is continuously ON (Vgs144>Vth) and transistor 142 is continuously OFF (Vgs142<Vth, i.e., Vgs142=0V if enhancement mode transistors are used), while transistor 141 is modulated by gate driver 151 with a pulse width modulation (PWM) signal to achieve the desired motor current. FIG. 3B indicates the path of the current 327 during the time that transistor 141 is biased ON. For this bias, the motor current flows through transistors 141 and 144, while no current flows through transistor 142 because transistor 142 is biased OFF, and the voltage at node 117 is close to HV, so transistor 142 blocks a voltage which is close to HV.
Referring to FIG. 3C, when transistor 141 is switched OFF, no current can flow through transistor 141, so the motor current flows in the reverse direction through transistor 142, which can occur whether transistor 142 is biased ON or OFF. Alternatively, an anti-parallel freewheeling diode (not shown) can be connected across transistor 142, in which case the reverse current flows through the freewheeling diode. During such operation, the inductive component 321 forces the voltage at node 117 to a sufficiently negative value to cause reverse conduction through transistor 142, and transistor 141 blocks a voltage which is close to HV.
The mode of switching illustrated in FIGS. 3A-3C and is commonly known as hard-switching. A hard-switching circuit configuration is one in which the switching transistors are configured to have high currents passing through them as soon as they are switched ON, and to have high voltages across them as soon as they are switched OFF. In other words, the transistors are switched ON during periods where non-zero currents flow through the inductive load, so substantial current flows through the transistors immediately or soon after the transistors are switched ON, rather than the current rising gradually. Similarly, the transistors are switched OFF during periods where high voltages must be blocked by the transistors, so substantial voltage is blocked by the transistors immediately or soon after the transistors are switched OFF, rather than the voltage rising gradually. Transistors switched under these conditions are said to be “hard-switched”.
For the prior art bridge circuits illustrated in FIGS. 1 and 3A-3C, each of the transistors 141-146 has a maximum switching rate at which the device can switch from the OFF state to the ON state or vice-versa, the maximum switching rate being largely dependent on the particular switching characteristics of the device, but also partially depending on other adjacent components in the circuit. The switching time for the switching of the voltages at the output nodes 161-166 of each of the gate drivers 151-156 can be much less than the switching times of each of their respective switching devices 141-146. Consequently, in the configurations of FIGS. 1 and 3A-3C, for which the outputs 161-166 of gate drivers 151-156 are electrically connected directly to the gates of their respective switching devices 141-146, devices 141-146 switch at their maximum switching rates during circuit operation. Furthermore, in order to maintain stability of the devices 141-146 and of the circuit 100, the maximum output current that can be supplied by the gate drivers 151-156 is chosen to be high. For example, the maximum output current of each of the gate drivers 151-156 is typically chosen to be at least 1/60 times the maximum rated output current of each of their respective switching devices 141-146.
Although hard-switched circuits tend to be simple to design and operate, hard-switched components tend to exhibit high levels of electro-magnetic interference (EMI) during operation, in particular in high voltage and/or high current applications in which the switching rate of each of the devices is very high. This can lead to circuit instability or catastrophic failure of the devices in the circuit. In particular, for the circuit configurations shown in FIGS. 1 and 3A-3C, if the circuit high voltage (HV) is large (e.g., greater than 300V) and/or the switching devices need to switch large currents (e.g., greater than 5 Amps), the circuits exhibit excessively high levels of EMI, become unstable, and cease to function properly.
Alternative circuit configurations make use of additional passive and/or active components, or alternatively signal timing techniques, to allow the transistors to be “soft-switched”. A soft-switching circuit configuration is one in which the switching transistors are configured to be switched ON during zero-current (or near zero-current) conditions and switched OFF during zero-voltage (or near zero-voltage) conditions. Soft-switching methods and configurations have been developed to address the high levels of EMI and associated ringing observed in hard-switched circuits, especially in high current and/or high voltage applications. While soft-switching can in many cases alleviate these problems, the circuitry required for soft switching typically includes many additional components, resulting in increased overall cost and complexity. Soft-switching also typically requires that the circuits be configured to switch only at specific times when the zero-current or zero-voltage conditions are met, hence limiting the control signals that can be applied and in many cases reducing circuit performance. Hence, alternative configurations and methods are desirable for power switching circuits in order to maintain sufficiently low levels of EMI while at the same time maintaining circuit stability.